It's certainly a curious topic and while discussing together, we concluded that iPhone5 has A15 dual core -
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438g/index.html
What it is ?
The Cortex-A15 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture. The Cortex-A15 MPCore processor has one to four processors in a single multiprocessor device, or MPCore device, with L1 and L2 cache subsystems.
In addition, A15 MPCore is a lot more powerful with -
NEON technology is the implementation of the Advanced Single Instruction Multiple Data (SIMD) extension to the ARMv7-A architecture. It provides support for integer and floating-point vector operations. This technology extends the processor functionality to provide support for the ARMv7 Advanced SIMDv2 instruction set.
VFP is the vector floating-point coprocessor extension to the ARMv7-A architecture. It provides low-cost high performance floating-point computation. VFP extends the processor functionality to provide support for the ARMv7 VFPv4 instruction set.
You can configure the Cortex-A15 MPCore processor to include different combinations of support for Advanced SIMD and VFP extensions.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438g/index.html
What it is ?
The Cortex-A15 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture. The Cortex-A15 MPCore processor has one to four processors in a single multiprocessor device, or MPCore device, with L1 and L2 cache subsystems.
In addition, A15 MPCore is a lot more powerful with -
NEON technology is the implementation of the Advanced Single Instruction Multiple Data (SIMD) extension to the ARMv7-A architecture. It provides support for integer and floating-point vector operations. This technology extends the processor functionality to provide support for the ARMv7 Advanced SIMDv2 instruction set.
VFP is the vector floating-point coprocessor extension to the ARMv7-A architecture. It provides low-cost high performance floating-point computation. VFP extends the processor functionality to provide support for the ARMv7 VFPv4 instruction set.
You can configure the Cortex-A15 MPCore processor to include different combinations of support for Advanced SIMD and VFP extensions.
sources : http://support.arm.com
NS throw some light on another revealation from www.anandtech.com which goes as follows -
The iPhone 5 will ship with and only run iOS 6.0. To coincide with the launch of iOS 6.0, Apple has seeded developers with a newer version of its development tools. Xcode 4.5 makes two major changes: it drops support for the ARMv6 ISA (used by the ARM11 core in the iPhone 2G and iPhone 3G), keeps support for ARMv7 (used by modern ARM cores) and it adds support for a new architecture target designed to support the new A6 SoC: armv7s.I find www.anandtech.com doing some reverse engineering which helps understand some which helps us know more on some of the secrets of the cut-throat industry of semiconductors.
What's the main difference between the armv7 and armv7s architecture targets for the LLVM C compiler? The presence of VFPv4 support. The armv7s target supports it, the v7 target doesn't. Why does this matter?Only the Cortex A5, A7 and A15 support the VFPv4 extensions to the ARMv7-A ISA. The Cortex A8 and A9 top out at VFPv3. If you want to get really specific, the Cortex A5 and A7 implement a 16 register VFPv4 FPU, while the A15 features a 32 register implementation. The point is, if your architecture supports VFPv4 then it isn't a Cortex A8 or A9.
It's pretty easy to dismiss the A5 and A7 as neither of those architectures is significantly faster than the Cortex A9 used in Apple's A5. The obvious conclusion then is Apple implemented a pair of A15s in its A6 SoC.For unpublishable reasons, I knew the A6 SoC wasn't based on ARM's Cortex A9, but I immediately assumed that the only other option was the Cortex A15. I foolishly cast aside the other major possibility: an Apple developed ARMv7 processor core.
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